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vishay siliconix SIP32510 document number: 63577 s13-1533-rev. c, 08-jul-13 www.vishay.com 1 this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 for technical questions, contact: powerictechsupport@vishay.com 1.2 v to 5.5 v, slew rate cont rolled load switch in tsot23-6 description SIP32510 is a slew rate controlled load switches designed for 1.2 v to 5.5 v operation. the switch element is of n-channel device that provides low r on of 44 m ? typically over a wide range of input. SIP32510 has low switch on-resist ance starting at 1.5 v input supply. it features a controlled soft on slew rate of typical 1.6 ms that limits the inrush current for designs of heavy capacitive load and minimizes the resulting voltage droop at the power rails. with a typical turn on delay of 0.4 ms, the total turn on time is typically 2 ms. the SIP32510 features a low voltage control logic interface (on/off interface) that can in terface with low voltage control signals without extra level shifting circuit. the SIP32510 has exceptionally low shutdown current and provides reverse blocking to prevent high current flowing into the power source. SIP32510 integrates a switch off output discharge circuit. SIP32510 is available in tsot23-6 package. features ? 1.2 v to 5.5 v operation voltage range ? flat low r on down to 1.5 v ? 44 m ? typical from 1.8 v to 5 v ? slew rate controlled turn-on: 1.6 ms at 3.3 v ? low quiescent current < 1 a when disabled 10.5 a typical at v in = 1.2 v ? reverse current blocking when switch is off, with guaranteed less than 2 a leakage ? material categorization: for definitions of compliance please see www.vishay.com/doc?99912 applications ? pdas/smart phones ? ultrabook and notebook computer ? tablet devices ? portable media players ? digital camera ? gps navigation devices ? data storage devices ? optical, industrial, medical, and healthcare devices ? peripherals ? office automation ? networking typical application circuit note: ge3 denotes halogen-free and rohs compliant figure 1 - SIP32510 typical application circuit ordering information temperature range package marking part number - 40 c to 85 c tsot23-6 lf SIP32510dt-t1-ge3 SIP32510 i n v out out v i n g n d g n d g n d e n e n c 4.7 f i n c 0.1 f out a v aila b le
www.vishay.com 2 document number: 63577 s13-1533-rev. c, 08-jul-13 vishay siliconix SIP32510 this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 for technical questions, contact: powerictechsupport@vishay.com notes: a. device mounted with all leads and power pad so ldered or welded to pc board, see pcb layout. b. derate 6.66 mw/c above t a = 25 c, see pcb layout. c. t a = 25 c. stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other condit ions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating/conditions for extended periods may affect device reliability. absolute maximum ratings parameter limit unit supply input voltage (v in ) - 0.3 to 6 v enable input voltage (v en ) - 0.3 to 6 output voltage (v out ) - 0.3 to 6 maximum continuous switch current (i max. ) c 3 a maximum repetitive pulsed current (1 ms, 10 % duty cycle) c 6 maximum non-repetitive pulsed current (100 s, en = active) c 12 esd rating (hbm) > 4 kv esd rating (cdm) 1.5 junction temperature (t j ) - 40 to 150 c thermal resistance ( ? ja ) a 150 c/w power dissipation (p d ) a,b 833 mw recommended operating range parameter limit unit input voltage range (v in ) 1.2 to 5.5 v operating junction temperature range (t j ) - 40 to 125 c specifications parameter symbol test conditions unless specified v in = 5 v, t a = - 40 c to 85 c (typical values are at t a = 25 c) limits - 40 c to 85 c unit min. a typ. b max. a operating voltage c v in 1.2 - 5.5 v quiescent current i q v in = 1.2 v, en = active - 10.5 17 a v in = 1.8 v, en = active - 21 30 v in = 2.5 v, en = active - 34 50 v in = 3.6 v, en = active - 54 90 v in = 4.3 v, en = active - 68 110 v in = 5 v, en = active - 105 180 off supply current i q(off) en = inactive, out = open - - 1 off switch current i ds(off) en = inactive, out = gnd - - 1 reverse blocking current i rb v out = 5 v, v in = 0 v, v en = inactive --10 on-resistance r ds(on) v in = 1.8 v, i l = 100 ma, t a = 25 c - 45 53 m ? v in = 2.5 v, i l = 100 ma, t a = 25 c - 44 52 v in = 3.6 v, i l = 100 ma, t a = 25 c -4452 v in = 4.3 v, i l = 100 ma, t a = 25 c - 44 52 v in = 5 v, i l = 100 ma, t a = 25 c -4652 on-resistance temp.-coefficient tc rds - 3570 - ppm/c
document number: 63577 s13-1533-rev. c, 08-jul-13 www.vishay.com 3 vishay siliconix SIP32510 this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 for technical questions, contact: powerictechsupport@vishay.com notes: a. the algebraic convention whereby the most negative value is a minimu m and the most positive a maximum. b. typical values are for design aid only, not guaranteed nor subject to production testing. c. for v in outside this range consult ty pical en threshold curve. d. not tested, guaranteed by design. e. not tested, guaranteed by correlation test with 10 ? , 0.1 f load. timming waveforms parameter symbol test conditions unless specified v in = 5 v, t a = - 40 c to 85 c (typical values are at t a = 25 c) limits - 40 c to 85 c unit min. a typ. b max. a en input low voltage c v il v in = 1.2 v --0.3 v v in = 1.8 v -- 0.4 d v in = 2.5 v -- 0.5 d v in = 3.6 v -- 0.6 d v in = 4.3 v -- 0.7 d v in = 5 v -- 0.8 d en input high voltage c v ih v in = 1.2 v 0.9 d -- v in = 1.8 v 1.2 d -- v in = 2.5 v 1.4 d -- v in = 3.6 v 1.6 d -- v in = 4.3 v 1.7 d -- v in = 5 v 1.8 - - en input leakage i sink v en = 5.5 v - 1 - 1 a output pulldown resistance r pd en = inactive, t a = 25 c - 217 280 ? switch turn-on response time d t on_resp v in = 3.3 v, t a = 25 c - 20 200 s output turn-on delay time (50 % en to 10 % out) t d(on) v in = 3.3 v, r load = 10 ? , c load = 0.1 f, t a = 25 c -0.4- ms output turn-on rise time (10 % out to 90 % out) t r 1.3 1.6 2.2 output turn-off delay time (50 % en to 90 % out) t d(off) --0.001 output turn-on time (50 % en to 95 % out) e t (on) v in = 3.3 v, r load = 10 ? , c load = 100 f, t a = 25 c 1.2 - 3 specifications figure 2 -
www.vishay.com 4 document number: 63577 s13-1533-rev. c, 08-jul-13 vishay siliconix SIP32510 this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 for technical questions, contact: powerictechsupport@vishay.com pin configuration block diagram figure 3 - tsot23-6 package 1 2 3 6 5 4 top v ie w pin description pin number name function 1, 2 out these are output pins of the switch 3 en enable input 4 gnd ground connection 5, 6 in these are input pins of the switch figure 4 - functional block diagram control logic t u rn on sle w rate control re v erse blocking charge p u mp g n d e n out i n
document number: 63577 s13-1533-rev. c, 08-jul-13 www.vishay.com 5 vishay siliconix SIP32510 this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 for technical questions, contact: powerictechsupport@vishay.com typical characteristics (internally regulated, 25 c, unless otherwise noted) figure 5 - quiescent current vs. input voltage figure 6 - off supply current vs. input voltage figure 7 - off switch current vs. input voltage 0 20 40 60 80 100 120 140 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 i q - quiescent current (a) v in (v) 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 i q(off) - off supply current (na) v in (v) 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 i ds(off) - off switch current (na) v in (v) figure 8 - quiescent current vs. temperature figure 9 - off supply current vs. temperature figure 10 - off switch current vs. temperature 0 20 40 60 80 100 120 - 40 - 20 0 20 40 60 80 100 i q - quiescent current (a) temperature ( c) v in = 5 v v in = 3.6 v v in = 1.2 v 0.001 0.01 0.1 1 10 100 1000 - 40 - 20 0 20 40 60 80 100 i iq(off) - off supply current (na) temperature ( c) v in = 1.2 v v in = 3.6 v v in = 5 v 0.001 0.01 0.1 1 10 100 1000 - 40 - 20 0 20 40 60 80 100 i ds(off) - off switch current (na) temperature ( c) v in = 5 v v in = 3.6 v v in = 1.2 v
www.vishay.com 6 document number: 63577 s13-1533-rev. c, 08-jul-13 vishay siliconix SIP32510 this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 for technical questions, contact: powerictechsupport@vishay.com typical characteristics (internally regulated, 25 c, unless otherwise noted) figure 11 - on-resistance vs. input voltage figure 12 - output pulldown resistance vs. input voltage 40 42 44 46 48 50 52 54 56 58 60 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 r ds - on-resistance (m) v in (v) i o = 2.0 a i o = 2.5 a i o = 1.5 a i o = 1.0 a i o = 0.1 a 0 100 200 300 400 500 600 700 800 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 r pd - output pulldown resistance () v in (v) v out = v in figure 13 - on-resistance vs. temperature figure 14 - output pulldown resistance vs. temperature 35 40 45 50 55 60 - 40 - 20 0 20 40 60 80 100 r ds - on-resistance (m) temperature ( c) i o = 0.1 a v in = 5 v 205 210 215 220 225 230 235 - 40 - 20 0 20 40 60 80 100 r pd - output pulldown resistance () temperature ( c) v out = v in = 5 v
SIP32510 vishay siliconix document number: 63577 s13-1533-rev. c, 08-jul-13 www.vishay.com 7 this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 for technical questions, contact: powerictechsupport@vishay.com typical characteristics (internally regulated, 25 c, unless otherwise noted) figure 15 - reverse blocking current vs. output voltage figure 16 - rise time vs. temperature - 12 - 10 - 8 - 6 - 4 - 2 0 0.5 1.0 1.5 2.0 2.5 3. 0 3.5 4.0 4.5 5.0 5.5 i in - input current (na) v out (v) v in = 0v 1.50 1.60 1.70 1.80 1.90 2.00 2.10 2.20 2.30 2.40 2.50 - 40 - 20 0 20 40 60 80 100 t r - rise time (ms) temperature ( c) v in = 5 v c l = 0.1 f r l = 10 figure 17 - turn-on delay time vs. temperature figure 18 - turn-off delay time vs. temperature 0 0.1 0.2 0.3 0.4 0.5 0.6 - 40 - 20 0 20 40 60 80 100 t d(on) - turn-on delay time (ms) temperature ( c) v in = 5 v c l = 0.1 f r l = 10 0.06 0.08 0.10 0.12 0.14 0.16 0.18 0.20 - 40 - 20 0 20 40 60 80 100 t d(off) - turn-off delay time (s) temperature ( c) v in = 5 v c l = 0.1 f r l = 10 figure 19 - en threshold voltage vs. input voltage 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 1.3 1.4 1.5 1.6 11.522.533.544.555.5 en threshold voltage (v) v in (v) v ih v il
www.vishay.com 8 document number: 63577 s13-1533-rev. c, 08-jul-13 vishay siliconix SIP32510 this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 for technical questions, contact: powerictechsupport@vishay.com typical waveforms figure 20 - typical turn-on delay, rise time c out = 0.1 f, c in = 4.7 f, i out = 1.5 a figure 21 - typical turn-on delay, rise time c out = 0.1 f, c in = 4.7 f, r out = 10 ? figure 22 - typical turn-on delay, rise time c out = 200 f, c in = 4.7 f, i out = 1.5 a 2 v/div, 2 a/div, 2 ms/div en 5vout 3.6vout 1.5vout iout for 5vout iout for 3.6vout iout for 1.5vout 2 v/div, 0.2 a/div, 2 ms/div en 5vout 3.6vout 1.5vout iout for 5vout iout for 3.6vout iout for 1.5vout 2 v/div, 2 a/div, 2 ms/div en 5vout 3.6vout 1.5vout iout for 5vout iout for 3.6vout iout for 1.5vout figure 23 - typical fall time c out = 0.1 f, c in = 4.7 f, i out = 1.5 a figure 24 - typical fall time c out = 0.1 f, c in = 4.7 f, r out = 10 ? figure 25 - typical fall time c out = 200 f, c in = 4.7 f, i out = 1.5 a 2 v/div, 2 a/div, 2 s/div en 5vout 3.6vout 1.5vout iout for 5vout iout for 3.6vout iout for 1.5vout 2 v/div, 0.2 a/div, 2 s/div en 5vout 3.6vout 1.5vout iout for 5vout iout for 3.6vout iout for 1.5vout 2 v/div, 2 a/div, 500 s /div en 5vout 3.6vout 1.5vout iout for 5vout iout for 3.6vout iout for 1.5vout
SIP32510 vishay siliconix document number: 63577 s13-1533-rev. c, 08-jul-13 www.vishay.com 9 this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 for technical questions, contact: powerictechsupport@vishay.com figure 26 - typical turn-on delay, rise time c out = 200 f, c in = 4.7 f, r out = 10 ? figure 27 - typical turn-on delay, rise time c out = 100 f, c in = 4.7 f, i out = 1.5 a figure 28 - typical turn-on delay, rise time c out = 100 f, c in = 4.7 f, r out = 10 ? 2 v/div, 0.2 a/div, 2 ms/div en 5vout 3.6vout 1.5vout iout for 5vout iout for 3.6vout iout for 1.5vout 2 v/div, 2 a/div, 2 ms/div en 5vout 3.6vout 1.5vout iout for 5vout iout for 3.6vout iout for 1.5vout 2 v/div, 0.2 a/div, 1 ms/div en 5vout 3.6vout 1.5vout iout for 5vout iout for 3.6vout iout for 1.5vout figure 29 - typical fall time c out = 200 f, c in = 4.7 f, r out = 10 ? figure 30 - typical fall time c out = 100 f, c in = 4.7 f, i out = 1.5 a figure 31 - typical turn-on delay, fall time c out = 100 f, c in = 4.7 f, r out = 10 ? 2 v/div, 0.2 a/div, 2 ms/div en 5vout 3.6vout 1.5vout iout for 5vout iout for 3.6vout iout for 1.5vout 2 v/div, 2 a/div, 200 s /div en 5vout 3.6vout 1.5vout iout for 5vout iout for 3.6vout iout for 1.5vout 2 v/div, 0.2 a/div, 2 ms/div en 5vout 3.6vout 1.5vout iout for 5vout iout for 3.6vout iout for 1.5vout
www.vishay.com 10 document number: 63577 s13-1533-rev. c, 08-jul-13 vishay siliconix SIP32510 this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 for technical questions, contact: powerictechsupport@vishay.com detailed description SIP32510 is advanced slew rate controlled high side load switch consisted of a n-channel power switch. when the device is enable the gate of the power switch is turned on at a controlled rate to avoid excessive in-rush current. once fully on the gate to source voltage of the power switch is biased at a constant level. the design gives a flat on resistance throughout the operating voltages. when the device is off, the reverse bl ocking circuitry prevents current from flowing back to input if output is raised higher than input. the reverse blocking mechanis m also works in case of no input applied. application information input capacitor SIP32510 does not require input capacitor. to limit the voltage drop on the input supply caused by transient inrush currents, a input bypass capacitor is recommended. a 2.2 f ceramic capacitor placed as close to the v in and gnd should be enough. higher values capacitor can help to further reduce the voltage drop. ceramic capacitors are recommended for their ability to withstand input current surge from low impedance sources such as batteries in portable devices. output capacitor while these devices work without an output capacitor, an 0.1 f or larger capacitor across v out and gnd is recommended to accommodate load transient condition. it also helps preventing parasitic inductance from forcing v out below gnd when switching off. output capacitor has minimal affect on device?s turn on slew rate time. there is no requirement on capacitor type and its esr. enable the en pin is compatible with both ttl and cmos logic voltage levels. enable pin voltage can be above in once it is within the absolute maximum rating range. protection against reverse voltage condition SIP32510 contains a reverse blocking circuitry to protect the current from going to the input from the output in case where the output voltage is higher than the input voltage when the main switch is off. reverse bl ocking works for input voltage as low as 0 v. thermal considerations SIP32510 is designed to maintain a constant output load current. due to physical limitations of the layout and assembly of the device the ma ximum switch current is 3 a, as stated in the absolute maximum ratings table. however, another limiting characteristic for the safe operating load current is the thermal power dissipation of the package. to obtain the highest power dissipation (and a thermal resistance of 150 c/w) the in and out pins of the device should be connected to heat sinks on the printed circuit board. all copper traces and vias for the in and out pins should be sized adequately to carry the maximum continuous current. the maximum power dissipation in any application is dependant on the maximum junction temperature, t j(max.) = 125 c, the junction-to-ambient thermal resistance for the tsot23-6 package, ? j-a = 150 c/w, and the ambient temperature, t a , which may be formulaically expressed as: it then follows that, assuming an ambient temperature of 70 c, the maximum power dissipation will be limited to about 367 mw. so long as the load current is below the 3 a limit, the maximum continuous switch current becomes a function of two things: the package power dissipation and the r ds(on) at the ambient temperature. as an example let us calculate the worst case maximum load current at t a = 70 c and 3.6 v input. the worst case r ds(on) at 25 c and 3.6 v input is 52 m ? . the r ds(on) at 70 c can be extrapolated from this data using the following formula: r ds(on) (at 70 c) = r ds(on) (at 25 c) x (1 + t c x ? t) where t c is 3570 ppm/c. continuing with the calculation we have r ds(on) (at 70 c) = 52 m ? x (1 + 0.00357 x (70 c - 25 c)) = 60 m ? the maximum current limit is then determined by which in this case is 2.4 a. under the stated input voltage condition, if the 2.4 a current limit is exceeded the internal die temperature will rise and eventually, possibly damage the device. active en pull down for reverse blocking when an internal circuit detects the condition of v out 0.8 v higher than v in , it will turn on the pull down circuit connected to en, forcing the switching off. the pull down value is about 1 k ? .. 150 125 (max.) (max.) a a j a j t t t p - = - = - ) ( (max.) (max.) o n ds load r p i < in en out reverse blocking charge pump control logic input buffer pull down circuit control and drive v out > v in detect when v out is 0.8 v above the v in , pull down circuit will be activated. it connects the en to gnd with a resistance of around 1 k .
SIP32510 vishay siliconix document number: 63577 s13-1533-rev. c, 08-jul-13 www.vishay.com 11 this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 for technical questions, contact: powerictechsupport@vishay.com pulse current capability the device is mounted on the evaluation board shown in the pcb layout section. it is lo aded with pulses of 5 a and 1 ms for periods of 4.6 ms. the SIP32510 can safely support 5 a pulse current repetitively at 25 c. switch non-repetitive pulsed current the SIP32510 can withstand inrush current of up to 12 a for 100 s at 25 c when heavy capacitive loads are connected and the part is already enabled. recommended board layout for the best performance, all traces should be as short as possible to minimize the inductance and parasitic effects. the input and output capacitors should be kept as close as possible to the input and output pins respectively. connecting the central expo sed pad to gnd, using wide traces for input, output, and gnd help reducing the case to ambient thermal impedance. r ds(on) measurement as mentioned in the thermal consideration section, the r ds(on) is an important specification for the load switch. a proper method to measure the r ds(on) will ensure the proper calculation of the maximum operating power the SIP32510 load switch. the kelvin connection directly to the input/output pin of the device is used to measure the dropout voltage of the SIP32510. by using the kelvin connection to measure the dropout voltage will eliminate the measurement error due to the voltage drop caused by the forced power current. as illustrated in the following layout, j6 (out-s) is kelvin connection to the output of SIP32510 and j5 (in-s) is the kelvin connection to the input of SIP32510. a current meter is used to measure the output current. r ds(on) is calculated by the following formula: vishay siliconix maintains worldwide manufacturing capability. pr oducts may be manufactured at one of several qualified locatio ns. reliability data for silicon technology and package reliability represent a composite of all qualified locations. for related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?63577 . 5 a 1 ms 180 ma 4.6 ms figure 32 - evaluation board layout for tsot23-6l dropo u t v oltage o u tp u t c u rrent = r ds(on)
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